MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 1003

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MPC564MZP66

Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP66

Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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HRESET
(Tool drives)
RSTI
(Tool drives)
MSEO
EVTI
(Tool drives)
MDO
MSEI
MDI
Device sends out
DID message after
negation of RSTI
Tool sends in DC message with
desired program trace mode enabled.
(BDM can also be enabled through.
DC register configuration. See note.)
Do not send an input message
until at least 2 MCKI after READI is
enabled, or wait until the DID message
is received from the READI module.
NOTE:
If background debug mode (BDM) is enabled,
the ICTRL register cannot be modified through
user program. This register can only be accessed
through the development port.
1
EVTI must be asserted
4 system clocks prior to the
READI module.
negation of RSTI to enable
2
MPC561/MPC563 Reference Manual, Rev. 1.2
DID Message
TCODE=1
3
DC Message
TCODE=18
After the HRESET negation,
the device will start executing
the reset instruction sequence
user program. In this user program,
set the ISCTL field = 0b01 in the
ICTRL register. Also the USIU
should be programmed to ignore
instruction showcycles to avoid
impacting U-bus performance.
Device Ready
TCODE=16
4
16 clocks after receiving
Tool negates HRESET
device ready message.
READI Module
24-35

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