MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 16

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.4.5
13.4.6
13.4.7
13.4.8
13.5
13.5.1
13.5.2
13.5.3
13.5.4
13.5.4.1
13.5.4.2
13.5.4.3
13.5.4.3.1
13.5.4.3.2
13.5.4.3.3
13.5.4.3.4
13.5.4.4
13.5.4.4.1
13.5.4.4.2
13.5.4.4.3
13.5.4.4.4
13.5.5
13.5.6
13.5.7
13.5.7.1
13.5.7.2
13.6
13.6.1
13.6.2
13.7
13.7.1
13.7.2
13.7.3
13.7.3.1
13.7.4
13.7.5
13.7.5.1
13.7.5.2
13.7.5.3
13.7.5.4
Freescale Semiconductor
Paragraph
Number
Digital Subsystem ....................................................................................................... 13-37
Trigger and Queue Interaction Examples ................................................................... 13-54
QADC64E Integration Requirements ......................................................................... 13-66
Comparator ............................................................................................................. 13-37
Bias ......................................................................................................................... 13-37
Successive Approximation Register ...................................................................... 13-37
State Machine ......................................................................................................... 13-37
Queue Priority ......................................................................................................... 13-38
Paused Sub-Queues ................................................................................................. 13-38
Boundary Conditions .............................................................................................. 13-40
Scan Modes ............................................................................................................. 13-41
QADC64E Clock (QCLK) Generation ................................................................... 13-47
Periodic / Interval Timer ......................................................................................... 13-51
Configuration and Control Using the IMB3 Interface ............................................ 13-51
Queue Priority Schemes .......................................................................................... 13-54
Conversion Timing Schemes .................................................................................. 13-63
Port Digital Input/Output Signals ........................................................................... 13-66
External Trigger Input Signals ................................................................................ 13-67
Analog Power Signals ............................................................................................. 13-67
Analog Reference Signals ....................................................................................... 13-71
Analog Input Signals .............................................................................................. 13-71
Disabled Mode .................................................................................................... 13-41
Reserved Mode ................................................................................................... 13-41
Single-Scan Modes ............................................................................................. 13-42
Continuous-Scan Modes ..................................................................................... 13-44
QADC64E Bus Interface Unit ............................................................................ 13-51
QADC64E Bus Accessing .................................................................................. 13-52
Analog Supply Filtering and Grounding ............................................................ 13-69
Analog Input Considerations .............................................................................. 13-73
Settling Time for the External Circuit ................................................................ 13-75
Error Resulting from Leakage ............................................................................ 13-75
Accommodating Positive/Negative Stress Conditions ....................................... 13-76
Software Initiated Single-Scan Mode ............................................................. 13-42
External Trigger Single-Scan Mode ............................................................... 13-43
External Gated Single-Scan Mode ................................................................. 13-43
Periodic/Interval Timer Single-Scan Mode .................................................... 13-44
Software Initiated Continuous-Scan Mode ..................................................... 13-45
External Trigger Continuous-Scan Mode ....................................................... 13-46
External Gated Continuous-Scan Mode ......................................................... 13-46
Periodic/Interval Timer Continuous-Scan Mode ............................................ 13-47
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Title
Number
Page
xvi