MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 211

no-image

MPC564MZP66

Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP66

Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564MZP66
Manufacturer:
FREESCALE
Quantity:
2 000
Part Number:
MPC564MZP66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564MZP66
Manufacturer:
FREESCALE
Quantity:
2 000
Part Number:
MPC564MZP66R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
The BIU may be programmed for burstable or non-burstable access. If the BIU is programmed for
burstable access, the U-bus address phase transaction is accompanied by the burst request attribute. If
burstable access is allowed by the U-bus slave, the BIU continues current access as burstable, otherwise
current access is executed as a single access. If any protection violation is detected by the IMPU, the
current U-bus access is aborted by the BIU and an exception is signaled to the RCPU.
Show cycle, program trace and debug port access attributes accompanying the RCPU access are forwarded
by the BIU along with the U-bus access.
4.2.1.2
See
mode.
4.2.2
The BBC may initiate and handle burst accesses on the U-bus. The BBCMCR[BE] bit determines whether
the BBC operates burst cycles or not. Burst requests are enabled when the BE bit is set. The BBC handles
non-wrap-around bursts with up to 4 data beats on the internal U-bus.
4.2.3
Instruction memory protection is assigned on a regional basis. Default operation of IMPU is done on a
global region. The IMPU has control registers which contain the following information: region protection
on/off, region base address, size and access permissions.
Protection logic is activated only if the RCPU MSR[IR] bit is set.
During each fetch request from the RCPU core to instruction memory, the address is compared to a value
in the region base address of enabled regions. Any address matching the specific region within its
appropriate size as defined in the region attribute register sets a match indication.
When more than one match indication occurs, the effective region is the region with the highest priority.
Priority is determined by region number. The lowest region number has the highest priority and the global
region has lowest priority.
Freescale Semiconductor
Appendix A, “MPC562/MPC564 Compression
Burst Operation of the BBC
Access Violation Detection
Decompression On Mode
The burst operation in the MPC561/MPC563 is useful if a user system
implements burstable memory devices on the external bus. Otherwise the
mode will cause performance degradation when running code from external
memory.
When the RCPU runs in serialized mode it is recommended that bursts be
disabled by the BBC to speed up MPC561/MPC563 operation.
Burst operation for decompression on and in debug mode is disabled
regardless of BBCMCR[BE] bit setting.
The BBC burst should be turned off if the USIU burst feature is enabled.
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
Features” for explanation of the decompression on
Burst Buffer Controller 2 Module
4-5

Related parts for MPC564MZP66