MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 221

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MPC564MZP66

Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP66

Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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In case of a BTB hit, the impact of instruction decompression latency (in compressed mode) is eliminated
as well as a latency of instruction storage memory device.
Freescale Semiconductor
BTE Miss — The target address and instruction code data will be stored in one of the BTE entries
defined by its control logic. Up to four instructions and their corresponding addresses subsequent
to the COF target instruction may be saved in each BTE entry. The number of valid instructions
currently stored in the BTE entry is written into the VDC field of the current BTE entry. The valid
flag is set at the end of this process. The entry to be replaced upon miss is chosen based on FIFO
replacement method. Thus the BTB can support up to eight different branch target addresses in a
program loop.
BTE Hit — When the target address of a branch matches one of the valid BTE entries, two
activities take place in parallel:
— The BTB supplies all the valid instructions in the matched entry to the RCPU.
— The BIU starts to prefetch new instructions (and ICDU decompresses them in compressed
mode) from the address following the last instruction that is stored in the matched BTB entry.
The BBC will supply these new instructions to the RCPU after all the stored instructions in the
matched BTB entry were delivered.
MPC561/MPC563 Reference Manual, Rev. 1.2
Burst Buffer Controller 2 Module
4-15

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