MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 293

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7.4
All of the reset sources are fed into the reset controller. The 16-bit reset status register (RSR) reflects the
most recent source, or sources, of reset. (Simultaneous reset requests can cause more than one bit to be set
at the same time.) This register contains one bit for each reset source. A bit set to logic one indicates the
type of reset that occurred.
Once set, individual bits in the RSR remain set until software clears them. Bits in the RSR can be cleared
by writing a one to the bit. A write of zero has no effect on the bit. The register can be read at all times.
The reset status register receives its default reset values during power-on reset. The RSR is powered by the
KAPWR pin.
Freescale Semiconductor
PORESET
1
HRESET
SRESET
OCCS will be set (1) if limp mode is enabled (SCCR[LME]=1).
SRESET
HRESET & SRESET
Bits
Field EHRS ESRS LLRS SWRS CSRS DBHRS DBSRS JTRS OCCS ILBC GPOR GHRST GSRST
Addr
0
1
2
Reset Status Register (RSR)
MSB
Table 7-2. Reset Configuration Word and Data Corruption/Coherency (continued)
0
EHRS
ESRS
Reset Driven
Name
LLRS
1
1
1
External hard reset status
0 No external hard reset has occurred
1 An external hard reset has occurred
External soft reset status
0 No external soft reset has occurred
1 An external soft reset has occurred
Loss of lock reset status
0 No enabled loss-of-lock reset has occurred
1 An enabled loss-of-lock reset has occurred
2
Table 7-3. Reset Status Register Bit Descriptions
3
0000_0000
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 7-1. Reset Status Register (RSR)
HRESET
HRESET || SRESET
4
Coherency (EXT_RESET)
0000_0000_000
Reset to Use for Data
0000_0000_0000
5
6
0x2F C288
Description
7
Provided only one of them is driven into the
MPC561/MPC563 at a time
0
8
1
0
9
10
1
Comments
11
1
1
12
1
1
1
13 14
000
000
000
—
Reset
LSB
15
7-5