MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 393

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MPC564MZP66

Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP66

Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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9.5.13
When the MPC561/MPC563 is in slave mode, external master access to the MPC561/MPC563 internal
bus can be terminated with relinquish and retry in order to allow a pending internal-to-external access to
be executed. The RETRY signal functions as an output that signals the external master to release the bus
ownership and retry the access after one clock.
Figure 9-39
external access is retried and a pending internal-to-external access follows.
Freescale Semiconductor
CLKOUT
BR (input)
BG
BB
ADDR[8:31]
RD/WR
TSIZ[0:1]
BURST
BDIP
Figure 9-38. Peripheral Mode: External Master Writes to MPC561/MPC563 (Two Wait States)
TS (input)
Data
TA (output)
Contention Resolution on External Bus
describes the flow of an external master retried access.
MPC561/MPC563 Reference Manual, Rev. 1.2
O
O
Receive Bus Grant and Bus Busy Negated
Use the Internal Arbiter
O
O
Assert BB, Drive Address and Assert TS
Minimum 2 Wait States
Figure 9-40
Data is sampled
shows the timing when an
External Bus Interface
O
9-53

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