MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 596

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

QADC64E Enhanced Mode Operation
When a trigger event causes a CCW execution in progress to be aborted, the aborted conversion is shown
as a ragged end of a shortened CCW rectangle.
The situation diagrams also show when key status bits are set.
Below the queue execution flows are three sets of blocks that show the status information that is made
available to the software. The first two rows of status blocks show the condition of each queue as:
The third row of status blocks shows the 4-bit QS status register field that encodes the condition of the two
queues. Two transition status cases, QS = 0011 and QS = 0111, are not shown because they exist only very
briefly between stable status conditions.
The first three examples in
a new trigger event is recognized before the queue has completed servicing the previous trigger event on
the same queue.
In situation S1
working on the previously recognized trigger event. The trigger overrun error status bit is set, and
otherwise, the premature trigger event is ignored. A trigger event which occurs before the servicing of the
previous trigger event is through does not disturb the queue execution in progress.
14-54
•
•
•
•
•
Idle
Active
Pause
Suspended (queue 2 only)
Trigger pending
(Figure
Trigger Overrun
Error (TOR)
CF Flag
PF Flag
Bit
14-25), one trigger event is being recognized on each queue while that queue is still
Figure 14-25
MPC561/MPC563 Reference Manual, Rev. 1.2
Set when the end of the queue is reached
Set when a queue completes execution up through a pause bit
Set when a new trigger event occurs before the queue is finished
serving the previous trigger event
through
Table 14-24. Status Bits
Figure 14-27
Function
(S1, S2, and S3) show what happens when
Table 14-24
describes the status bits.
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