MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 67

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MPC564MZP66

Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP66

Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Freescale Semiconductor
Table
Number
QADCINT Bit Descriptions ................................................................................................. 13-12
PORTQA, PORTQB Bit Descriptions.................................................................................. 13-14
QACR0 Bit Descriptions ...................................................................................................... 13-15
QACR1 Bit Descriptions ...................................................................................................... 13-16
Queue 1 Operating Modes .................................................................................................... 13-16
QACR2 Bit Descriptions ...................................................................................................... 13-18
Queue 2 Operating Modes .................................................................................................... 13-19
QASR0 Bit Descriptions....................................................................................................... 13-21
Pause Response..................................................................................................................... 13-25
Queue Status ......................................................................................................................... 13-25
QASR1 Bit Descriptions....................................................................................................... 13-27
CCW Bit Descriptions .......................................................................................................... 13-30
Non-Multiplexed Channel Assignments and Signal Designations....................................... 13-31
Multiplexed Channel Assignments and Signal Designations ............................................... 13-32
QADC64E Clock Programmability ...................................................................................... 13-50
Trigger Events....................................................................................................................... 13-54
Status Bits ............................................................................................................................. 13-55
Error Resulting from Input Leakage (IOFF)......................................................................... 13-76
QADC64E_A Address Map ................................................................................................... 14-3
QADC64E_B Address Map.................................................................................................... 14-4
Multiplexed Analog Input Channels....................................................................................... 14-6
Analog Input Channels ........................................................................................................... 14-7
QADCMCR Bit Descriptions ................................................................................................. 14-8
QADC64E Bus Error Response............................................................................................ 14-11
QADCINT Bit Descriptions ................................................................................................. 14-12
PORTQA, PORTQB Bit Descriptions.................................................................................. 14-13
QACR0 Bit Descriptions ...................................................................................................... 14-15
Prescaler f
QACR1 Bit Descriptions ...................................................................................................... 14-17
Queue 1 Operating Modes .................................................................................................... 14-17
QACR2 Bit Descriptions ...................................................................................................... 14-19
Queue 2 Operating Modes .................................................................................................... 14-20
QASR0 Bit Descriptions....................................................................................................... 14-22
Pause Response..................................................................................................................... 14-26
Queue Status ......................................................................................................................... 14-26
QASR1 Bit Descriptions....................................................................................................... 14-28
CCW Bit Descriptions .......................................................................................................... 14-31
QADC64E_A Multiplexed Channel Assignments and Signal Designations ....................... 14-32
External Circuit Settling Time to 1/2 LSB (10-Bit Conversions) ....................................... 13-75
SYSCLK
Divide-by Values.................................................................................... 14-15
MPC561/MPC563 Reference Manual, Rev. 1.2
Tables
Title
Number
Page
lxvii

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