MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 688

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MPC564MZP66

Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP66

Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Queued Serial Multi-Channel Module
15.8.8
The block diagram of the enhancements to the SCI receiver is shown below in
15.8.9
Additional QSCI1 features include:
15-70
Receiver Baud Rate
Clock
SCI1 Non-Queue Operation
Available on a single SCI channel (SCI1) implemented by the queue receiver enable (QRE) bit set
by software. When the queue is enabled, software should ignore the RDRF bit.
When the queue is disabled (QRE = 0), the SCI functions in single buffer receive mode (as
originally designed) and RDRF and OR function as previously defined. Locations SCRQ[0:15] can
QSCI1 Receiver Block Diagram
QSCI1 Additional Receive Operation Features
RxD
Queue Control
Figure 15-38. Queue Receiver Block Enhancements
MPC561/MPC563 Reference Manual, Rev. 1.2
H (8) 7 6 5 4 3 2 1 0 L
SCxDR Rx BUFFER
10 (11) - Bit
Rx Shift Register
Queue Status
4-bits
Queue Control
Logic
SCI Interrupt Request
SCRQ0
SCRQ1
SCRQ15
Figure
Freescale Semiconductor
15-38.
Data Bus

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