MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 749

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

17.7.1.1
The MCPSM has no associated external signals.
17.7.1.2
17.7.2
When the RESET signal is asserted, all the bits in the MCPSM status and control register are cleared.
17.7.3
The privilege level to access to the MCPSM registers is supervisor only.
17.7.3.1
Freescale Semiconductor
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Programmable 4-bit modulus down-counter
Wide range of possible division ratios: 2 through 16
Count inhibit under software control
The MCPSM is connected to all the signals in the read/write and control bus, to allow data transfer
from and to the MCPSM registers, and to control the MCPSM in the different possible situations.
The MIOS14 counter prescaler submodule does not use any 16-bit counter bus.
The MIOS14 counter prescaler submodule does not use the request bus.
Effect of RESET on MCPSM
MCPSM Registers
MCPSM Signal Functions
Modular I/O Bus (MIOB) Interface
MCPSM Registers Organization
0x30 6810
0x30 6812
0x30 6814
0x30 6816
The MCPSM is still disabled after the RESET signal is negated and
counting must be explicitly enabled by asserting MCPSMSCR[PREN].
Address
Reserved
Reserved
Reserved
MCPSM Status/Control Register (MCPSMSCR)
Table 17-6. MCPSM Register Address Map
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
Register
Modular Input/Output Subsystem (MIOS14)
17-17