MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 870

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

CDR3 Flash (UC3F) EEPROM
21.2.1.3
The UC3FMCRE is an extended module configuration register used for configuring the small block
functions. In addition, 16 bits of the UC3FMCRE are used to provide a source for module identification.
21-8
1
16:23
24:31
Note that the LOCK bit is in a different bit location on the MPC563 than in the MPC555. It was at bit 0 of CMFMCR.
Bits
PROTECT Block protect. Each array block of the UC3F EEPROM can be individually protected from program
Name
UC3F EEPROM Extended Configuration Register (UC3FMCRE)
DATA
Data space. The DATA bits are write protected by LOCK and CSC. Writes to DATA have no effect
if LOCK = 0 or CSC = 1. The DATA bits may be read whenever the registers are enabled.
Each array block of the UC3F EEPROM may be mapped into data or data and instruction address
space. When array block M is mapped into data address space (DATA[M] = 1), only data accesses
will be allowed. When array block M is mapped into both Data and Instruction address space
(DATA[M] = 0), both data and instruction accesses will be allowed.
The DATA bits are not actually used in the UC3F EEPROM module but are used by the BIU to
determine access restrictions to UC3F array on a blockwise basis. The block addresses are
decoded in the BIU to determine which array block is selected, and the selected block’s DATA bit
is compared with the address space attributes to determine validity of an array access.
When the small block function is enabled, the enabled small block portion of an array block is not
controlled by the DATA bit corresponding to the array block containing that small block. This
particular small block is controlled by the appropriate SBDATA bit while the remainder of that array
block is controlled by its DATA bit.
0 array block M is placed in both data and instruction address spaces
1 array block M is placed in data address space
or erase operation. The contents of array block M are protected from program or erase by setting
PROTECT[M] = 1. The UC3F will perform all program and erase interlocks and complete the
program or erase sequence, but the program and erase voltages are not applied to locations within
the protected array block(s), blocks whose corresponding PROTECT bit is set to 1. By setting
PROTECT[M] = 0, array block M is enabled for program and erase operation, and its contents may
be altered by programming or erasing.
When the small block function is enabled, the enabled small block portion of an array block is not
controlled by the PROTECT bit corresponding to the array block containing that small block. This
particular small block is controlled by the appropriate SBPROTECT bit while the remainder of that
array block is controlled by its PROTECT bit.
0 array block M is unprotected
1 array block M is protected
Table 21-3. UC3FMCR Bit Descriptions (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
Description
Freescale Semiconductor