C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 176

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F320/1
16.1. Supporting Documents
It is assumed the reader is familiar with or has access to the following supporting documents:
16.2. SMBus Configuration
Figure 16.2 shows a typical SMBus configuration. The SMBus specification allows any recessive voltage between
3.0 V and 5.0 V; different devices on the bus may operate at different voltage levels. The bi-directional SCL (serial
clock) and SDA (serial data) lines must be connected to a positive power supply voltage through a pull-up resistor or
similar circuit. Every device connected to the bus must have an open-drain or open-collector output for both the SCL
and SDA lines, so that both are pulled high (recessive state) when the bus is free. The maximum number of devices
on the bus is limited only by the requirement that the rise and fall times on the bus not exceed 300 ns and 1000 ns,
respectively.
176
1.
2.
3.
VDD = 5V
The I
The I
System Management Bus Specification -- Version 1.1, SBS Implementers Forum.
2
2
C-Bus and How to Use It (including specifications), Philips Semiconductor.
C-Bus Specification -- Version 2.0, Philips Semiconductor.
Figure 16.2. Typical SMBus Configuration
VDD = 3V
Master
Device
Rev. 1.1
VDD = 5V
Device 1
Slave
VDD = 3V
Device 2
Slave
SDA
SCL

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