C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 203

• Manufacturer Part Number: C8051F320
• Description: IC 8051 MCU 16K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F320

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

18.
The Enhanced Serial Peripheral Interface (SPI0) provides access to a flexible, full-duplex synchronous serial bus.
SPI0 can operate as a master or slave device in both 3-wire or 4-wire modes, and supports multiple masters and slaves
on a single SPI bus. The slave-select (NSS) signal can be configured as an input to select SPI0 in slave mode, or to
disable Master Mode operation in a multi-master environment, avoiding contention on the SPI bus when more than
one master attempts simultaneous data transfers. NSS can also be configured as a chip-select output in master mode,
or disabled for 3-wire operation. Additional general purpose port I/O pins can be used to select multiple slave devices
in master mode.
ENHANCED SERIAL PERIPHERAL INTERFACE (SPI0)
SYSCLK
Clock Divide
SPI0CKR
SFR Bus
SPI0DAT
Logic
Write
Transmit Data Buffer
Receive Data Buffer
7
Figure 18.1. SPI Block Diagram
6
Shift Register
5
SPI CONTROL LOGIC
4
3
Data Path
2
SFR Bus
Control
SPI0CFG
SPI0DAT
1
SPI0DAT
Read
0
Tx Data
Rx Data
Rev. 1.1
Pin Interface
Control
Control
Logic
Pin
SPI0CN
MOSI
MISO
SCK
NSS
O
C
R
S
S
B
A
R
SPI IRQ
C8051F320/1
Port I/O
203