C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 231

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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19.3.2. 8-bit Timers with Auto-Reload
When T3SPLIT is set, Timer 3 operates as two 8-bit timers (TMR3H and TMR3L). Both 8-bit timers operate in auto-
reload mode as shown in Figure 19.12. TMR3RLL holds the reload value for TMR3L; TMR3RLH holds the reload
value for TMR3H. The TR3 bit in TMR3CN handles the run control for TMR3H. TMR3L is always running when
configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK, SYSCLK divided by 12, or the external oscillator clock source
divided by 8. The Timer 3 Clock Select bits (T3MH and T3ML in CKCON) select either SYSCLK or the clock
defined by the Timer 3 External Clock Select bit (T3XCLK in TMR3CN), as follows:
The TF3H bit is set when TMR3H overflows from 0xFF to 0x00; the TF3L bit is set when TMR3L overflows from
0xFF to 0x00. When Timer 3 interrupts are enabled (IE.5), an interrupt is generated each time TMR3H overflows. If
Timer 3 interrupts are enabled and TF3LEN (TMR3CN.5) is set, an interrupt is generated each time either TMR3L or
TMR3H overflows. When TF3LEN is enabled, software must check the TF3H and TF3L flags to determine the
source of the Timer 3 interrupt. The TF3H and TF3L interrupt flags are not cleared by hardware and must be manu-
ally cleared by software.
External Clock / 8
T3MH
0
0
1
SYSCLK / 12
T3XCLK
T3XCLK
X
0
1
0
1
Figure 19.21. Timer 3 8-Bit Mode Block Diagram
SYSCLK
TMR3H Clock Source
External Clock / 8
SYSCLK / 12
SYSCLK
0
1
1
0
T
3
M
H
M
T
3
L
CKCON
M
H
T
2
M
T
2
L
TR3
M
T
1
M
T
0
S
C
A
1
S
C
A
0
TCLK
TCLK
Rev. 1.1
TMR3RLH
TMR3RLL
TMR3H
TMR3L
T3ML
0
0
1
Reload
Reload
T3XCLK
X
0
1
To ADC
T3SPLIT
TF3LEN
T3XCLK
T3SOF
TF3H
TF3L
TR3
C8051F320/1
TMR3L Clock Source
External Clock / 8
SYSCLK / 12
SYSCLK
Interrupt
231

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