MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 197

• Manufacturer Part Number: MC908AZ32ACFU
• Description: IC MCU 32K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ32ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

18.8 I/O Registers
These I/O registers control and monitor TIMA operation:
18.8.1 TIMA Status and Control Register
The TIMA status and control register:
TOF — TIMA Overflow Flag Bit
TOIE — TIMA Overflow Interrupt Enable Bit
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This read/write flag is set when the TIMA counter reaches the modulo value programmed in the TIMA
counter modulo registers. Clear TOF by reading the TIMA status and control register when TOF is set
and then writing a logic 0 to TOF. If another TIMA overflow occurs before the clearing sequence is
complete, then writing logic 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost
due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic 1 to TOF has no effect.
This read/write bit enables TIMA overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
1 = TIMA counter has reached modulo value.
0 = TIMA counter has not reached modulo value.
1 = TIMA overflow interrupts enabled
0 = TIMA overflow interrupts disabled
TIMA status and control register (TASC)
TIMA control registers (TACNTH–TACNTL)
TIMA counter modulo registers (TAMODH–TAMODL)
TIMA channel status and control registers (TASC0, TASC1, TASC2, TASC3, TASC4 and TASC5)
TIMA channel registers (TACH0H–TACH0L, TACH1H–TACH1L, TACH2H–TACH2L,
TACH3H–TACH3L, TACH4H–TACH4L and TACH5H–TACH5L)
Enables TIMA overflow interrupts
Flags TIMA overflows
Stops the TIMA counter
Resets the TIMA counter
Prescales the TIMA counter clock
Address:
Reset:
Read:
Write:
Figure 18-4. TIMA Status and Control Register (TASC)
$0020
Bit 7
TOF
R
0
0
= Reserved
TOIE
6
0
MC68HC908AZ32A Data Sheet, Rev. 2
TSTOP
5
1
TRST
4
0
0
R
3
0
0
PS2
2
0
PS1
1
0
Bit 0
PS0
0
I/O Registers
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