MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 238

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MC908AZ32ACFU

Manufacturer Part Number
MC908AZ32ACFU
Description
IC MCU 32K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ32ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Keyboard Module (KBD)
22.3 Functional Description
Writing to the KBIE4–KBIE0 bits in the keyboard interrupt enable register independently enables or
disables each port G or port H pin as a keyboard interrupt pin. Enabling a keyboard interrupt pin also
enables its internal pullup device. A logic 0 applied to an enabled keyboard interrupt pin latches a
keyboard interrupt request.
A keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The MODEK
bit in the keyboard status and control register controls the triggering mode of the keyboard interrupt.
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low level-sensitive, and both
of the following actions must occur to clear a keyboard interrupt request:
The vector fetch or software clear and the return of all enabled keyboard interrupt pins to logic 1 may occur
in any order.
238
Keyboard Status and Control Register
Keyboard Interrupt Enable Register
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an
interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on
one pin because another pin is still low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an interrupt request is present as
long as any keyboard pin is low.
Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a logic 1
to the ACKK bit in the keyboard status and control register (KBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine also can
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFDE and $FFDF.
Return of all enabled keyboard interrupt pins to logic 1. As long as any enabled keyboard interrupt
pin is at logic 0, the keyboard interrupt remains set.
Register Name
(KBSCR)
(KBIER)
Reset:
Reset:
Read:
Read:
Write:
Write:
Table 22-1. I/O Register Address Summary
Register
Address
Figure 22-2. I/O Register Summary
MC68HC908AZ32A Data Sheet, Rev. 2
Bit 7
0
0
0
0
= Unimplemented
KBSCR
6
0
0
0
0
$001B
5
0
0
0
0
KBIE4
4
0
0
0
KBIER
$0021
KBIE3
KEYF
3
0
0
KBIE2
ACKK
2
0
0
0
Freescale Semiconductor
IMASKK
KBIE1
1
0
0
MODEK
KBIE0
Bit 0
0
0

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