MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 257

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MC908AZ32ACFU

Manufacturer Part Number
MC908AZ32ACFU
Description
IC MCU 32K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ32ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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When bit DDRFx is a logic 1, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic 0, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
23.8 Port G
Port G is a 3-bit special function port that shares all of its pins with the keyboard interrupt module (KBD).
Note that Port G is only available on 64-pin package options.
23.8.1 Port G Data Register
The port G data register contains a data latch for each of the three port G pins.
PTG[2:0] — Port G Data Bits
KBD[2:0] — Keyboard Wakeup pins
Freescale Semiconductor
These read/write bits are software programmable. Data direction of each port G pin is under the control
of the corresponding bit in data direction register G. Reset has no effect on PTG[2:0].
The keyboard interrupt enable bits, KBIE[2:0], in the keyboard interrupt control register, enable the port
G pins as external interrupt pins (See
interrupt pin will override the corresponding DDRGx.
Function:
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Address:
Alternate
Reset:
Read:
Write:
DDRF
Bit
0
1
$000A
Bit 7
R
R
0
PTF
Bit
Figure 23-20. Port G Data Register (PTG)
X
X
= Reserved
R
6
0
Table 23-6. Port F Pin Functions
MC68HC908AZ32A Data Sheet, Rev. 2
Input, Hi-Z
Chapter 22 Keyboard Module
I/O Pin
Output
Mode
R
5
0
Table 23-6
Unaffected by Reset
R
4
0
Accesses to
Read/Write
DDRF[6:0]
DDRF[6:0]
DDRF
summarizes the operation of the port F pins.
R
3
0
PTF[6:0]
PTG2
KBD2
Read
Pin
2
Accesses to PTF
(KBD)). Enabling an external
PTG1
KBD1
1
PTF[6:0]
PTF[6:0]
Write
PTG0
KBD0
Bit 0
(1)
Port G
257

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