MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 274

• Manufacturer Part Number: MC908AZ32ACFU
• Description: IC MCU 32K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ32ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MSCAN Controller (MSCAN08)
MSCAN08 bus activity can wake the MCU from CPU Stop/MSCAN08 power-down mode. However, until
the oscillator starts up and synchronisation is achieved the MSCAN08 will not respond to incoming data.
24.8.4 CPU Wait Mode
The MSCAN08 module remains active during CPU wait mode. The MSCAN08 will stay synchronized to
the CAN bus and generates transmit, receive, and error interrupts to the CPU, if enabled. Any such
interrupt will bring the MCU out of wait mode.
24.8.5 Programmable Wakeup Function
The MSCAN08 can be programmed to apply a low-pass filter function to the RxCAN input line while in
internal sleep mode (see information on control bit WUPM in
1). This feature can be used to protect the MSCAN08 from wake-up due to short glitches on the CAN bus
lines. Such glitches can result from electromagnetic inference within noisy environments.
24.9 Timer Link
The MSCAN08 will generate a timer signal whenever a valid frame has been received. Because the CAN
specification defines a frame to be valid if no errors occurred before the EOF field has been transmitted
successfully, the timer signal will be generated right after the EOF. A pulse of one bit time is generated.
As the MSCAN08 receiver engine also receives the frames being sent by itself, a timer signal also will be
generated after a successful transmission.
The previously described timer signal can be routed into the on-chip timer interface module (TIM).This
signal is connected to the timer n channel m input
bit in the CMCR0.
After timer n has been programmed to capture rising edge events, it can be used under software control
to generate 16-bit time stamps which can be stored with the received message.
24.10 Clock System
Figure 24-7
clock generation module (CGM). With this flexible clocking scheme the MSCAN08 is able to handle CAN
bus rates ranging from 10 kbps up to 1 Mbps.
The clock source bit (CLKSRC) in the MSCAN08 module control register (CMCR1) (see
MSCAN08 Module Control Register
crystal oscillator or to the PLL output.
The clock source has to be chosen such that the tight oscillator tolerance requirements (up to 0.4%) of
the CAN protocol are met.
1. The timer channel being used for the timer link is integration dependent.
274
shows the structure of the MSCAN08 clock generation circuitry and its interaction with the
If the system clock is generated from a PLL, it is recommended to select the
crystal clock source rather than the system clock source due to jitter
considerations, especially at faster CAN bus rates.
MC68HC908AZ32A Data Sheet, Rev. 2
0) defines whether the MSCAN08 is connected to the output of the
NOTE
(1)
under the control of the timer link enable (TLNKEN)
24.13.2 MSCAN08 Module Control Register
Freescale Semiconductor
24.13.1