MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 286

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MC908AZ32ACFU

Manufacturer Part Number
MC908AZ32ACFU
Description
IC MCU 32K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ32ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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286 MSCAN Controller (MSCAN08)
24.13.4 MSCAN08 Bus Timing Register 1
SAMP — Sampling
TSEG22–TSEG10 — Time Segment
1. In this case PHASE_SEG1 must be at least 2 time quanta.
286
This bit determines the number of serial bus samples to be taken per bit time. If set, three samples per
bit are taken, the regular one (sample point) and two preceding samples, using a majority rule. For
higher bit rates, SAMP should be cleared, which means that only one sample will be taken per bit.
Time segments within the bit time fix the number of clock cycles per bit time and the location of the
sample point. Time segment 1 (TSEG1) and time segment 2 (TSEG2) are programmable as shown in
Table
The bit time is determined by the oscillator frequency, the baud rate prescaler, and the number of time
quanta (T
TSEG13
1. This setting is not valid. Please refer to
1 = Three samples per bit
0 = One sample per bit
0
0
0
0
1
.
.
24-8.
q
) clock cycles per bit as shown in
Address:
The CBTR1 register can only be written if the SFTRES bit in the MSCAN08
module control register is set.
TSEG12
Reset:
Read:
Write:
0
0
0
0
1
.
.
$0503
SAMP
Bit 7
TSEG11
0
Bit time =
0
0
1
1
1
Figure 24-18. Bus Timing Register 1 (CBTR1)
.
.
TSEG22
(1)
6
0
TSEG10
Table 24-8. Time Segment Values
MC68HC908AZ32A Data Sheet, Rev. 2
0
1
0
1
1
.
.
Pres value
f
MSCANCLK
Table 24-4
TSEG21
5
0
2 T
3T
1 T
16 T
4 T
Segment 1
q
q
q
Time
q
Table
Cycles
Cycles
q
Cycle
Cycles
NOTE
for valid settings.
TSEG20
.
.
Cycles
4
0
• number of Time Quanta
(1)
(1)
(1)
24-8).
TSEG13
TSEG22
3
0
0
0
1
.
.
TSEG12
2
0
TSEG21
0
0
1
.
.
TSEG11
1
0
TSEG20
0
1
1
.
.
Freescale Semiconductor
TSEG10
Bit 0
0
1 T
2 T
Segment 2
8T
q
q
Time
q
Cycle
Cycles
Cycles
.
.
(1)

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