MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 58

• Manufacturer Part Number: MC908AZ32ACFU
• Description: IC MCU 32K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ32ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

EEPROM
AUTO — Automatic termination of program/erase cycle
EEPGM — EEPROM Program/Erase Enable
5.5.2 EEPROM Array Configuration Register
The EEPROM array configuration register configures EEPROM security and EEPROM block protection.
This read-only register is loaded with the contents of the EEPROM nonvolatile register (EENVR) after a
reset.
Bit 7:5 — Unused Bits
EEPRTCT — EEPROM Protection Bit
EEBP[3:0] — EEPROM Block Protection Bits
58
When AUTO is set, EEPGM is cleared automatically after the program/erase cycle is terminated by
the internal timer.
(See note D for
EEPROM Memory
This read/write bit enables the internal charge pump and applies the programming/erasing voltage to
the EEPROM array if the EELAT bit is set and a write to a valid EEPROM location has occurred. Reset
clears the EEPGM bit.
These read/write bits are software programmable but have no functionality.
The EEPRTCT bit is used to enable the security feature in the EEPROM (see
Program/Erase
This feature is a write-once feature. Once the protection is enabled it may not be disabled.
These bits prevent blocks of EEPROM array from being programmed or erased.
See
1 = Automatic clear of EEPGM is enabled
0 = Automatic clear of EEPGM is disabled
1 = EEPROM programming/erasing power switched on
0 = EEPROM programming/erasing power switched off
1 = EEPROM security disabled
0 = EEPROM security enabled
1 = EEPROM array block is protected
0 = EEPROM array block is unprotected
Table
Address:
5-4.
Writing logic 0s to both the EELAT and EEPGM bits with a single instruction
will clear EEPGM only to allow time for the removal of high voltage.
Reset:
Read: UNUSED
Write:
5.4.5.25.4.5.25.4.5.2 EEPROM
Protection).
Figure 5-3. EEPROM Array Configuration Register (EEACR)
Characteristics)
$FE1F
Bit 7
= Unimplemented
UNUSED
6
MC68HC908AZ32A Data Sheet, Rev. 2
UNUSED
5
Contents of EENVR ($FE1C)
EEPRTCT
NOTE
Programming,
4
EEBP3
3
5.4.5.3 EEPROM Erasing
EEBP2
2
EEBP1
1
5.4.3 EEPROM
Freescale Semiconductor
EEBP0
Bit 0
and
25.1.13