HD64F2319EVTE25 Renesas Electronics America, HD64F2319EVTE25 Datasheet - Page 445
HD64F2319EVTE25
Manufacturer Part Number
HD64F2319EVTE25
Description
IC H8S MCU FLASH 512K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of HD64F2319EVTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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10.6.4
If compare match events A and B occur at the same time, the 8-bit timer operates in accordance
with the priorities for the output statuses set for compare match A and compare match B, as shown
in table 10.4.
Table 10.4 Timer Output Priorities
Output Setting
Toggle output
1 output
0 output
No change
10.6.5
TCNT may increment erroneously when the internal clock is switched over. Table 10.5 shows the
relationship between the timing at which the internal clock is switched (by writing to the CKS1
and CKS0 bits) and the TCNT operation.
When the TCNT clock is generated from an internal clock, the falling edge of the internal clock
pulse is detected. If clock switching causes a change from high to low level, as shown in case 3 in
table 10.5, a TCNT clock pulse is generated on the assumption that the switchover is a falling
edge. This increments TCNT.
The erroneous incrementation can also happen when switching between internal and external
clocks.
Contention between Compare Matches A and B
Switching of Internal Clocks and TCNT Operation
Priority
High
Low
Rev.7.00 Feb. 14, 2007 page 411 of 1108
Section 10 8-Bit Timers
REJ09B0089-0700
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