HD64F2319EVTE25 Renesas Electronics America, HD64F2319EVTE25 Datasheet - Page 517
HD64F2319EVTE25
Manufacturer Part Number
HD64F2319EVTE25
Description
IC H8S MCU FLASH 512K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of HD64F2319EVTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Quantity
Price
Company:
Part Number:
HD64F2319EVTE25
Manufacturer:
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Quantity:
10 000
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Part Number:
HD64F2319EVTE25V
Manufacturer:
RENESAS
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Data Transfer Operations
SCI initialization (synchronous mode): Before transmitting or receiving data, first clear the TE
and RE bits in SCR to 0, then initialize the SCI as described below.
When the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared to
0 before making the change using the following procedure. When the TE bit is cleared to 0, the
TDRE flag is set to 1 and TSR is initialized. Note that clearing the RE bit to 0 does not change the
contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.
Figure 12.15 shows a sample SCI initialization flowchart.
Note: In simultaneous transmit and receive operations, the TE and RE bits should
set RIE, TIE, TEIE, and MPIE bits
Set TE or RE bit in SCR to 1, and
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
Set data transfer format in
both be cleared to 0 or set to 1 simultaneously.
1-bit interval elapsed?
Start of initialization
Set value in BRR
SMR and SCMR
<Transfer start>
(TE, RE bits 0)
as necessary
Figure 12.15 Sample SCI Initialization Flowchart
Yes
Wait
No
[4]
[2]
[3]
[1]
Section 12 Serial Communication Interface (SCI)
[1] Set the clock selection in SCR. Be sure
[2] Set the data transfer format in SMR
[3] Write a value corresponding to the bit
[4] Wait at least one bit interval, then set
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
and SCMR.
rate to BRR. (Not necessary if an
external clock is used.)
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits as necessary.
Setting the TE or RE bit enables the
TxD or RxD pin to be used.
Rev.7.00 Feb. 14, 2007 page 483 of 1108
REJ09B0089-0700
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