HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 563

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.2.7
The transmit acknowledge register (TXACK) is a 16-bit readable/writable register containing
status flags that indicate normal transmission of mailbox (buffer) transmit messages.
Note:
Bits 15 to 9 and 7 to 0—Transmit Acknowledge Register (TXACK7 to TXACK1, TXACK15
to TXACK8): These bits indicate that a transmit message in the corresponding HCAN mailbox
has been transmitted normally.
Bit 8—Reserved: This bit always reads 0. The write value should always be 0.
Bit x
TXACKx
0
1
Initial value:
Initial value:
TXACK
* Can only be written with 1 for flag clearing.
Transmit Acknowledge Register (TXACK)
[Clearing condition]
Writing 1
Completion of message transmission for corresponding mailbox
Description
R/W:
R/W:
Bit:
Bit:
TXACK15 TXACK14 TXACK13 TXACK12 TXACK11 TXACK10 TXACK9 TXACK8
TXACK7 TXACK6 TXACK5 TXACK4 TXACK3 TXACK2 TXACK1
R/(W) *
R/(W) *
15
0
7
0
R/(W) *
R/(W) *
14
0
6
0
R/(W) *
R/(W) *
13
0
5
0
R/(W) *
R/(W) *
12
Section 15 Controller Area Network (HCAN)
0
4
0
Rev. 5.00 Jan 10, 2006 page 537 of 1042
R/(W) *
R/(W) *
11
0
3
0
R/(W) *
R/(W) *
10
0
2
0
REJ09B0275-0500
R/(W) *
R/(W) *
9
0
1
0
(Initial value)
R/(W) *
—
R
8
0
0
0