HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 178
HD6417709SF133B
Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of HD6417709SF133B
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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6.3.2
ICR0 is a register that sets the input signal detection mode of external interrupt input pin NMI, and
indicates the input signal level at the NMI pin. This register is initialized to H'0000 or H'8000 by a
power-on reset or manual reset, but is not initialized in standby mode.
Note: * 1 when NMI input is high, 0 when NMI input is low.
Bit 15—NMI Input Level (NMIL): Sets the level of the signal input at the NMI pin. This bit can
be read to determine the NMI pin level. This bit cannot be modified.
Bit 15: NMIL
0
1
Bit 8—NMI Edge Select (NMIE): Selects whether the falling or rising edge of the interrupt
request signal at the NMI pin is detected.
Bit 8: NMIE
0
1
Bits 14 to 9 and 7 to 0—Reserved: These bits are always read as 0. The write value should
always be 0.
Rev. 5.00, 09/03, page 132 of 760
Initial value:
Initial value:
Interrupt Control Register 0 (ICR0)
R/W:
R/W:
Bit:
Bit:
Description
NMI input level is low
NMI input level is high
Description
Interrupt request is detected on falling edge of NMI input
Interrupt request is detected on rising edge of NMI input
NMIL
0/1 *
15
—
R
R
7
0
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
10
—
—
R
R
0
2
0
—
—
R
R
9
0
1
0
NMIE
R/W
—
R
8
0
0
0
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