HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 208
HD6417709SF133B
Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of HD6417709SF133B
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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7.2.9
BRCR sets the following conditions:
1. Channels A and B are used in two independent channels condition or under the sequential
2. A break is set before or after instruction execution.
3. A break is set by the number of execution times.
4. Determine whether to include data bus on channel B in comparison conditions.
5. Enable PC trace.
6. Enable the ASID check.
The break control register (BRCR) is a 32-bit read/write register that has break conditions match
flags and bits for setting a variety of break conditions. A power-on reset initializes BRCR to
H'00000000.
Bits 31 to 22—Reserved: These bits are always read as 0. The write value should always be 0.
Rev. 5.00, 09/03, page 162 of 760
condition.
Initial value:
Initial value:
Initial value:
Initial value:
Break Control Register (BRCR)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
SCMFCA SCMFCB SCMFDA SCMFDB PCTE
DBEB
R/W
R/W
31
23
15
—
—
R
R
0
0
0
7
0
PCBB
R/W
R/W
30
22
14
—
—
R
R
0
0
0
6
0
BASMA BASMB
R/W
R/W
29
21
13
—
—
R
R
0
0
0
5
0
R/W
R/W
28
20
12
—
—
R
R
0
0
0
4
0
SEQ
R/W
R/W
27
19
11
—
—
R
R
0
0
0
3
0
PCBA
R/W
26
18
10
—
—
—
R
R
R
0
0
0
2
0
25
17
—
—
—
—
R
R
R
R
0
0
9
0
1
0
ETBE
R/W
24
16
—
—
—
R
R
R
0
0
8
0
0
0
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