HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 320
HD6417709SF133B
Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of HD6417709SF133B
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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When software wait insertion is specified by WCR2, the external wait input WAIT signal is also
sampled. WAIT pin sampling is shown in figure 10.11. A 2-cycle wait is specified as a software
wait. Sampling is performed at the transition from the Tw state to the T
WAIT signal has no effect if asserted in the T
When the WAITSEL bit in the WCR1 register is set to 1, the WAIT signal is sampled at the
falling edge of the clock. If the setup time and hold times with respect to the falling edge of the
clock are not satisfied, the value sampled at the next falling edge is used.
However, the WAIT signal is ignored in the following three cases:
Rev. 5.00, 09/03, page 274 of 760
A write to external address space in dual address mode with 16-byte DMA transfer
Transfer from an external device with DACK to external address space in single address mode
with 16-byte DMA transfer
Cache write-back access
1
cycle or the first Tw cycle.
2
state; therefore, if the
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