HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 483

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

14.2.6
The serial control register (SCSCR) operates the SCI transmitter/receiver, selects the serial clock
output in asynchronous mode, enables/disables interrupt requests, and selects the transmit/receive
clock source. The CPU can always read and write to SCSCR. SCSCR is initialized to H'00 by a
reset and in standby or module standby mode.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables the transmit-data-empty interrupt
(TXI) requested when the transmit data register empty bit (TDRE) in the serial status register
(SCSSR) is set to 1 due to transfer of serial transmit data from SCTDR to SCTSR.
Note: * The TXI interrupt request can be cleared by reading TDRE after it has been set to 1, then
Bit 6—Receive Interrupt Enable (RIE): Enables or disables the receive-data-full interrupt (RXI)
requested when the receive data register full bit (RDRF) in the serial status register (SCSSR) is set
to 1 due to transfer of serial receive data from SCRSR to SCRDR. It also enables or disables
receive-error interrupt (ERI) requests.
Note: * RXI and ERI interrupt requests can be cleared by reading the RDRF flag or error flag
Bit 7: TIE
0
1
Bit 6: RIE
0
1
Initial value:
clearing TDRE to 0, or by clearing TIE to 0.
(FER, PER, or ORER) after it has been set to 1, then clearing the flag to 0, or by clearing
RIE to 0.
Serial Control Register (SCSCR)
R/W:
Bit:
Description
Transmit-data-empty interrupt request (TXI) is disabled *
Transmit-data-empty interrupt request (TXI) is enabled
Description
Receive-data-full interrupt (RXI) and receive-error interrupt (ERI) requests are
disabled *
Receive-data-full interrupt (RXI) and receive-error interrupt (ERI) requests are
enabled
R/W
TIE
7
0
R/W
RIE
6
0
R/W
TE
5
0
R/W
RE
4
0
MPIE
R/W
3
0
Rev. 5.00, 09/03, page 437 of 760
TEIE
R/W
2
0
CKE1
R/W
1
0
(Initial value)
(Initial value)
CKE0
R/W
0
0