MC68HC11E0CFNE3 Freescale Semiconductor, MC68HC11E0CFNE3 Datasheet - Page 31

• Manufacturer Part Number: MC68HC11E0CFNE3
• Description: IC MCU 8BIT 3MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E0CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Controller Family/series: 68HC11
• No. Of I/o's: 38
• Ram Memory Size: 512Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Digital Ic Case Style: LCC
• Rohs Compliant: Yes
• Processor Series: HC11E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

TECHNICAL DATA
Mnemonic
LDAA (opr)
LDAB (opr)
JMP (opr)
JSR (opr)
LDD (opr)
LDS (opr)
LDX (opr)
LDY (opr)
LSR (opr)
INC (opr)
LSL (opr)
LSLD
LSRA
INCA
INCB
LSLA
LSLB
INS
INX
INY
Index Register
Index Register
Stack Pointer
Memory Byte
Load Double
Accumulator
Accumulator
Accumulator
Accumulator
Accumulator
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Left Double
Load Stack
Load Index
Load Index
Operation
Subroutine
Increment
Increment
Increment
Increment
Increment
Increment
Register
Register
Jump to
Right A
Pointer
Left A
Left B
Jump
Right
Load
Load
Left
A
B
X
Y
A
B
D
X
Y
C
M
0
0
M : M + 1
See Figure 3–2
See Figure 3–2
M : M + 1
M : M + 1
C
C
C
SP + 1
b7
Description
IX + 1
IY + 1
M + 1
A + 1
B + 1
b7
b7
A
b7
b7
b7
A,M + 1
M
M
Freescale Semiconductor, Inc.
b0
Table 3-2 Instruction Set (Sheet 4 of 7)
b7
For More Information On This Product,
A
B
b0
b0
b0
b0
b0
M
A
B
IX
IY
B
SP
SP
IX
IY
b0
0
0
0
C
C
B
0
CENTRAL PROCESSING UNIT
A
B
A
A
A
A
A
B
B
B
B
B
A
B
A
Addressing
Go to: www.freescale.com
Mode
EXT
IND,X
IND,Y
INH
INH
INH
INH
INH
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
IMM
IMM
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
EXT
IND,X
IND,Y
INH
INH
INH
EXT
IND,X
IND,Y
INH
DIR
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
18
18
18
18
18
18
18
18
CD
18
18
18
1A
18
18
18
Opcode
7C
6C
6C
4C
5C
31
08
08
7E
6E
6E
9D
BD
86
96
A6
A6
C6
D6
E6
E6
CC
DC
EC
EC
8E
9E
AE
AE
CE
DE
EE
EE
CE
DE
FE
EE
EE
78
68
68
48
58
05
74
64
64
44
AD
AD
B6
F6
FC
BE
FE
Instruction
hh ll
ff
ff
hh ll
ff
ff
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
hh ll
ff
ff
hh ll
ff
ff
Operand Cycles
—
—
—
—
—
—
—
—
—
6
6
7
2
2
3
3
4
3
3
4
5
6
6
7
2
3
4
4
5
2
3
4
4
5
3
4
5
5
6
3
4
5
5
6
3
4
5
5
6
4
5
6
6
6
6
6
7
2
2
3
6
6
7
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
S
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
H
Condition Codes
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I
—
—
—
—
—
N
0
0
—
—
—
Z
—
—
—
—
—
V
0
0
0
0
0
0
3-11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
C