DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 19
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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3.5
Section 4 Exception Handling ...........................................................................99
4.1
4.2
4.3
4.4
4.5
4.6
4.7
Section 5 Interrupt Controller ............................................................................109
5.1
5.2
5.3
5.4
Memory Map in Each Operating Mode ............................................................................ 81
Overview........................................................................................................................... 99
4.1.1
4.1.2
4.1.3
Reset.................................................................................................................................. 102
4.2.1
4.2.2
4.2.3
4.2.4
Traces................................................................................................................................ 104
Interrupts ........................................................................................................................... 105
Trap Instruction................................................................................................................. 106
Stack Status after Exception Handling.............................................................................. 106
Notes on Use of the Stack ................................................................................................. 107
Overview........................................................................................................................... 109
5.1.1
5.1.2
5.1.3
5.1.4
Register Descriptions ........................................................................................................ 112
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Interrupt Sources ............................................................................................................... 117
5.3.1
5.3.2
5.3.3
Interrupt Operation............................................................................................................ 124
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
Exception Handling Types and Priority............................................................... 99
Exception Handling Operation............................................................................. 100
Exception Vector Table ....................................................................................... 100
Overview.............................................................................................................. 102
Reset Sequence .................................................................................................... 102
Interrupts after Reset............................................................................................ 103
State of On-Chip Supporting Modules after Reset Release ................................. 103
Features................................................................................................................ 109
Block Diagram ..................................................................................................... 110
Pin Configuration................................................................................................. 111
Register Configuration......................................................................................... 111
System Control Register (SYSCR) ...................................................................... 112
Interrupt Priority Registers A to K (IPRA to IPRK) ............................................ 113
IRQ Enable Register (IER) .................................................................................. 114
IRQ Sense Control Registers H and L (ISCRH, ISCRL)..................................... 115
IRQ Status Register (ISR).................................................................................... 116
External Interrupts ............................................................................................... 117
Internal Interrupts................................................................................................. 118
Interrupt Exception Vector Table ........................................................................ 118
Interrupt Control Modes and Interrupt Operation ................................................ 124
Interrupt Control Mode 0 ..................................................................................... 127
Interrupt Control Mode 2 ..................................................................................... 129
Interrupt Exception Handling Sequence .............................................................. 131
Interrupt Response Times .................................................................................... 133
Rev.7.00 Feb. 14, 2007 page xvii of xxxii
REJ09B0089-0700
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