DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 224
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 7 Data Transfer Controller
transferred, and the contents of CRAH are sent when the count reaches H'00. This operation is
repeated.
7.2.6
CRB is a 16-bit register that designates the number of times data is to be transferred by the DTC in
block transfer mode. It functions as a 16-bit transfer counter (1 to 65,536) that is decremented by 1
every time data is transferred, and transfer ends when the count reaches H'0000.
7.2.7
The DTC enable registers comprise six 8-bit readable/writable registers, DTCERA to DTCERF,
with bits corresponding to the interrupt sources that can activate the DTC. These bits enable or
disable DTC service for the corresponding interrupt sources.
The DTC enable registers are initialized to H'00 by a reset and in hardware standby mode.
Rev.7.00 Feb. 14, 2007 page 190 of 1108
REJ09B0089-0700
Bit
Initial value :
R/W
Bit
Initial value :
R/W
DTC Transfer Count Register B (CRB)
DTC Enable Registers (DTCER)
:
:
:
:
Unde-
fined
15
—
DTCE7
R/W
7
0
Unde-
fined
14
—
Unde-
fined
13
—
DTCE6
R/W
6
0
Unde-
fined
12
—
Unde-
fined
11
—
DTCE5
R/W
5
0
Unde-
fined
10
—
Unde-
fined
—
DTCE4
9
R/W
4
0
Unde-
fined
—
8
Unde-
fined
—
DTCE3
7
R/W
3
0
Unde-
fined
—
6
Unde-
fined
—
DTCE2
5
R/W
2
0
Unde-
fined
—
4
Unde-
fined
—
DTCE1
3
R/W
1
0
Unde-
fined
—
2
Unde-
fined
—
DTCE0
1
R/W
0
0
Unde-
fined
—
0
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