DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 243
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 7.10 Number of States Required for Each Execution Phase
Access To:
Bus width
Access states
The number of execution states is calculated from the formula below. Note that Σ means the sum
of all transfers activated by one activation event (the number in which the CHNE bit is set to 1,
plus 1).
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 13 states. The time from activation to the end of the data write is 10 states.
Execution
phase
Number of execution states = I · S
Byte data read
Word data read
Byte data write
Word data write
Internal operation S
Vector read
Register
information
read/write
S
S
S
S
S
S
K
K
L
L
M
I
J
On-
Chip
RAM
32
1
1
1
1
1
1
—
1
I
+ Σ (J · S
On-
Chip
ROM
16
1
1
1
1
1
1
1
—
2
Internal I/O
Registers
8
—
—
2
4
2
4
1
J
+ K · S
Rev.7.00 Feb. 14, 2007 page 209 of 1108
16
2
—
2
2
2
2
1
—
K
Section 7 Data Transfer Controller
+ L · S
External Devices
8
2
2
4
2
4
1
4
—
L
) + M · S
8
3
3+m
6+2m 2
3+m
6+2m 2
1
6+2m 2
—
REJ09B0089-0700
M
16
2
2
2
1
—
16
3
3+m
—
3+m
3+m
3+m
3+m
1
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