DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 538
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 13 Smart Card Interface
Bit 2
SINV
0
1
Bit 1—Reserved: Read-only bit, always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the smart card interface
function.
Bit 0
SMIF
0
1
13.2.2
Note: * Only 0 can be written to bits 7 to 3, to clear these flags.
Bit 4 of SSR has a different function in smart card interface mode. Coupled with this, the setting
conditions for bit 2, TEND, are also different.
Bits 7 to 5—Operate in the same way as for the normal SCI. For details, see section 12.2.7, Serial
Status Register (SSR).
Bit 4—Error Signal Status (ERS): In smart card interface mode, bit 4 indicates the status of the
error signal sent back from the receiving end in transmission. Framing errors are not detected in
smart card interface mode.
Rev.7.00 Feb. 14, 2007 page 504 of 1108
REJ09B0089-0700
Bit
Initial value :
R/W
Serial Status Register (SSR)
Description
TDR contents are transmitted as they are
Receive data is stored as it is in RDR
TDR contents are inverted before being transmitted
Receive data is stored in inverted form in RDR
Description
Smart card interface function is disabled
Smart card interface function is enabled
:
:
R/(W) *
TDRE
7
1
R/(W) *
RDRF
6
0
R/(W) *
ORER
5
0
R/(W) *
ERS
4
0
R/(W) *
PER
3
0
TEND
R
2
1
MPB
R
1
0
(Initial value)
(Initial value)
MPBT
R/W
0
0
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