DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 759
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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On-Chip RAM Address Map when Programming/Erasing Is Executed: Parts of the procedure
program that are made by the user, like download request, programming/erasing procedure, and
judgement of the result, must be executed in the on-chip RAM. The on-chip program that is to be
downloaded is all in the on-chip RAM. Note that area in the on-chip RAM must be controlled so
that these parts do not overlap.
Figure 17.69 shows the program area to be downloaded.
Area to be downloaded
(Size: 4 kbytes)
Unusable area in
programming/erasing
processing period
Figure 17.69 RAM Map when Programming/Erasing is Executed
DPFR (Return value: 1 byte)
Initialization + programming
Programming/erasing entry
Initialization process entry
program or Initialization +
RAM emulation area
or area that can be
System use area
<On-chip RAM>
Area that can be
Area that can be
Area that can be
erasing program
used by user
used by user
used by user
used by user
(15 bytes)
Rev.7.00 Feb. 14, 2007 page 725 of 1108
Address
RAMTOP(H'FFBC00)
FTDAR setting
FTDAR setting+16
FTDAR setting+32
FTDAR setting+4k
H'FFDC00
H'FFEC00
RAMEND(H'FFFBFF)
REJ09B0089-0700
Section 17 ROM
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