DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 770
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 17 ROM
vector is read from is undetermined. Perform MAT switching in accordance with the description
in section 17.27, Switching between User MAT and User Boot MAT.
Except for MAT switching, the programming procedure is the same as that in user program mode.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 17.29.3, Procedure Program and Storable Area for
Programming Data.
User MAT Erasing in User Boot Mode: For erasing the user MAT in user boot mode, additional
processings made by setting FMATS are required: switching from user-boot-MAT selection state
to user-MAT selection state, and switching back to user-boot-MAT selection state after erasing
completes.
Figure 17.74 shows the procedure for erasing the user MAT in user boot mode.
Rev.7.00 Feb. 14, 2007 page 736 of 1108
REJ09B0089-0700
set download destination
and bus master operation
Select on-chip program
JSR FTDAR setting+32
Set FKEY to H'A5 and
Set SCO to 1 and
execute download
Figure 17.74 Procedure for Erasing User MAT in User Boot Mode
Clear FKEY to 0
procedure program
to be downloaded
Set the FPEFEQ
Disable interrupts
other than CPU
Initialization
Start erasing
FPFR=0 ?
by FTDAR
DPFR=0 ?
parameter
1
Yes
Yes
Initialization error processing
Download error processing
No
No
User-boot-MAT
selection state
Note: * The MAT must be switched by FMATS to perform the
No
Set FMATS to H'AA to
than H'AA to select user MAT
erasing error processing in the user boot MAT.
JSR FTDAR setting+16
Set FEBS parameter
select user boot MAT
Set FMATS to value other
Set FKEY to H'5A
procedure program
Clear FKEY to 0
block erasing is
Programming
End erasing
completed?
FPFR=0 ?
Required
1
Yes
Yes
Clear FKEY and erasing
error processing *
No
switchover
switchover
MAT
MAT
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