HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 451
HD64F3029XBL25V
Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3029X25.pdf
(1012 pages)
Specifications of HD64F3029XBL25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Different Triggers for TPC Output Groups 0 and 1: If TPC output groups 0 and 1 are triggered
by different compare match events, the address of the upper 4 bits of NDRA (group 1) is
H'FFFA5 and the address of the lower 4 bits (group 0) is H'FFFA7. Bits 3 to 0 of address
H'FFFA5 and bits 7 to 4 of address H'FFFA7 are reserved bits that cannot be modified and always
read 1.
Address H'FFFA5
Address H'FFFA7
Rev. 2.0, 06/04, page 422 of 980
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
NDR7
R/W
—
—
1
0
7
7
Next data 7 to 4
These bits store the next output
data for TPC output group 1
NDR6
R/W
Reserved bits
—
—
1
6
0
6
NDR5
R/W
—
—
1
0
5
5
NDR4
R/W
—
—
1
4
0
4
NDR3
R/W
—
—
1
3
0
3
Next data 3 to 0
These bits store the next output
data for TPC output group 0
NDR2
R/W
Reserved bits
—
—
2
0
1
2
NDR1
R/W
—
—
1
0
1
1
NDR0
R/W
—
—
1
0
0
0
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