HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 664
HD64F3029XBL25V
Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3029X25.pdf
(1012 pages)
Specifications of HD64F3029XBL25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Figure 18.18 shows an example of an overlap on block area EB0 of the flash memory.
Emulation is possible for a single area selected from among the eight areas, from EB0 to EB7, of
user MAT bank 0. The area is selected by the setting of the RAM2 to RAM0 bits in the RAMCR
register.
(1) To overlap a part of the RAM on area EB0, to allow realtime programming of the data for this
(2) Realtime programming is carried out using the overlaid area of RAM.
In programming or erasing the user MAT, it is necessary to run a program that implements a
series of procedural steps, including the downloading of a on-chip program. In this process, set the
download area with FTDAR so that the overlaid RAM area and the area where the on-chip
program is to be downloaded do not overlap. The initial setting (H'00) of FTDAR or a setting of
H'01 causes part of the tuned data area to overlap with part of the download area. When using the
initial setting of FTDAR, the data that is to be programmed must be saved beforehand in an area
that is not used by the system.
Figure 18.19 shows an example of programming of the data, after emulation has been completed,
to the EB0 area in the user MAT.
area, set the RAMCR register's RAMS bit to 1, and each of the RAM2 to RAM0 bits to 0.
H'7FFFF
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
Flash memory
EB8 to EB15
Figure 18.18 Example of a RAM-Overlap Operation
(user MAT)
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area is accessible as both a RAM
area and as a flash memory area.
On-chip RAM
Rev. 2.0, 06/04, page 635 of 980
H'FFBF20
H'FFE000
H'FFEFFF
H'FFFF1F
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