M30626FJPGP#D3C Renesas Electronics America, M30626FJPGP#D3C Datasheet - Page 277

MCU 3/5V 512K 100-LQFP

M30626FJPGP#D3C

Manufacturer Part Number
M30626FJPGP#D3C
Description
MCU 3/5V 512K 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30626FJPGP#D3C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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5.5 Interrupt Priority
Chapter 5
Figure 5.5.1. Interrupt priority that is set in hardware
If two or more interrupt requests are sampled active at the same time, whichever interrupt request is ac-
knowledged that has the highest priority.
Maskable interrupts (Peripheral I/O interrupts) can be assigned any desired priority by setting the interrupt
priority level select bit accordingly. If some maskable interrupts are assigned the same priority level, the
priority between these interrupts is resolved by the priority that is set in hardware
Certain nonmaskable interrupts such as a reset (reset is given the highest priority) and watchdog timer
interrupt have their priority levels set in hardware. Figure 5.5.1 lists the hardware priority levels of these
interrupts.
Software interrupts are not subjected to interrupt priority. They always cause control to branch to an inter-
rupt routine whenever the relevant instruction is executed.
*1 Hardware priority varies with each M16C model. Please refer to your M16C User’s Manual.
Reset > NMI > DBC > Watchdog timer > Peripheral I/O > Single step > Address match
_______
Interrupt
________
259
*1
.
5.5 Interrupt Priority

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