R5F21226JFP#U0 Renesas Electronics America, R5F21226JFP#U0 Datasheet - Page 527
R5F21226JFP#U0
Manufacturer Part Number
R5F21226JFP#U0
Description
IC R8C/22 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/22r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21226JFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21226JFP#U0R5F21226JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21226JFP#U0R5F21226JFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Rev.
0.20
REVISION HISTORY
Jun 28, 2006
Date
Page
104
106
118
121
122
126
127
128
129
148
84
85
86
90
91
92
94
98
10.4.1.3 Low-Speed On-Chip Oscillator Mode, on the 8th line;
10.4.2.2 Entering Wait Mode revised.
10.4.2.3 Pin Status in Wait Mode revised.
10.4.2.4 Exiting Wait Mode revised.
Table 10.3 Interrupts to Exit Wait Mode and Usage Conditions;
Figure 10.10 Time from Wait Mode to Interrupt Routine Execution
added.
Figure 10.12 Procedure for Switching Clock Source from Low-Speed
On-Chip Oscillator to XIN Clock revised.
Figure 10.13 Example of Determining Interrupt Source for Oscillation
Stop Detection, Watchdog Timer, Voltage Monitor 1, or Voltage Monitor
2 Interrupt revised.
10.6 Notes on Clock Generation Circuit revised.
Figure 12.1 Interrupts;
Table 12.2 Relocatable Vector Tables;
Table 12.5 IPL Value When Software or Special Interrupt Is
Acknowledged;
Figure 12.10 Priority Levels of Hardware Interrupts;
12.7 Notes on Interrupts;
Figure 13.1 Block Diagram of Watchdog Timer;
Figure 13.2 Registers OFS and WDC revised.
14. Timers;
Table 14.1 Functional Comparison of Timers;
14.1 Timer RA, the 5th line;
Figure 14.1 Block Diagram of Timer RA revised.
Figure 14.2 Registers TRACR and TRAIOC;
14.1.6 Notes on Timer RA;
R8C/22 Group, R8C/23 Group Hardware Manual
“In this mode, ~ consumption operation.” added.
CM02 = 1 of Timer RA Interrupt revised.
CM02 = 1 of Timer RD Interrupt revised.
Address break (2) added.
“A0RIC” → “S0RIC” corrected.
“Address break” added.
“Address break” added.
“12.7 Precautions on Interrupts” → “12.7 Notes on Interrupts” revised.
“(“L”) active”, “PM12: Bit in PM1 register” added.
“The count source for ~ counting and reloading” deleted.
Count source of Timer RD, “TRCIOA0” → “TRDIOA0” corrected.
“The count source for ~ counting and reloading” added.
The TRAIOC register revised.
“14.1.6 Precautions on Timer RA” → “14.1.6 Notes on Timer RA”
revised.
C - 4
Description
Summary
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