LT1800CS5#TRMPBF Linear Technology, LT1800CS5#TRMPBF Datasheet - Page 12

• Manufacturer Part Number: LT1800CS5#TRMPBF
• Description: IC OPAMP R-RIN/OUT LP TSOT-23-5
• Manufacturer: Linear Technology

Specifications of LT1800CS5#TRMPBF

• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 23 V/µs
• Gain Bandwidth Product: 70MHz
• Current - Input Bias: 400nA
• Voltage - Input Offset: 1000µV
• Current - Supply: 1.8mA
• Current - Output / Channel: 50mA
• Voltage - Supply, Single/dual (±): 2.3 V ~ 12.6 V, ±1.15 V ~ 6.3 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: TSOT-23-5, TSOT-5, TSOP-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Other names: LT1800CS5#TRMPBFTR

APPLICATIONS INFORMATION
LT1800
Circuit Description
The LT1800 has an input and output signal range that cov-
ers from the negative power supply to the positive power
supply. Figure 1 depicts a simplifi ed schematic of the
amplifi er. The input stage is comprised of two differential
amplifi ers, a PNP stage Q1/Q2 and an NPN stage Q3/Q4
that are active over the different ranges of common mode
input voltage. The PNP differential pair is active between the
negative supply to approximately 1.2V below the positive
supply. As the input voltage moves closer toward the posi-
tive supply, the transistor Q5 will steer the tail current I
the current mirror Q6/Q7, activating the NPN differential
pair and the PNP pair becomes inactive for the rest of the
input common mode range up to the positive supply. Also
at the input stage, devices Q17 to Q19 act to cancel the bias
current of the PNP input pair. When Q1-Q2 are active, the
current in Q16 is controlled to be the same as the current
in Q1-Q2, thus the base current of Q16 is nominally equal
to the base current of the input devices. The base current
of Q16 is then mirrored by devices Q17-Q19 to cancel the
base current of the input devices Q1-Q2.
12
V
V
+
–
Q16
+
I
2
+IN
–IN
Q17
Q18
ESDD1
ESDD4
V
V
+
–
V
V
–
+
ESDD2
D6
D5
ESDD3
Figure 1. LT1800 Simplifi ed Schematic Diagram
Q19
D8
D7
Q4
Q7
D1
D2
Q3
1
to
Q5
Q6
A pair of complementary common emitter stages Q14/Q15
that enable the output to swing from rail to rail constructs
the output stage. The capacitors C2 and C3 form the lo-
cal feedback loops that lower the output impedance at
high frequency. These devices are fabricated on Linear
Technology’s proprietary high speed complementary
bipolar process.
Power Dissipation
The LT1800 amplifi er is offered in a small package, SOT-23,
which has a thermal resistance of 250°C/W, θ
a need to ensure that the die’s junction temperature should
not exceed 150°C. Junction temperature T
from the ambient temperature T
and thermal resistance θ
The power dissipation in the IC is the function of the sup-
ply voltage, output voltage and the load resistance. For
a given supply voltage, the worst-case power dissipation
P
V
DMAX
BIAS
T
Q1
+
J
D3
D4
= T
Q2
occurs at the maximum supply current and the
I
1
A
+ (P
Q10
D
• θ
Q11
JA
)
Q9
R3
R1
Q12
JA
:
Q8
R4
R2
C
C
+
A
, power dissipation P
V
OUTPUT BIAS
Q13
–
R5
BUFFER
I
3
AND
C2
C1
J
JA
is calculated
1800 F01
. So there is
Q15
Q14
OUT
1800fa
D