LM6132BIN National Semiconductor, LM6132BIN Datasheet - Page 11

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LM6132BIN

Manufacturer Part Number
LM6132BIN
Description
IC OP AMP DUAL H SPEED LP 8-DIP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM6132BIN

Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
14 V/µs
Gain Bandwidth Product
11MHz
Current - Input Bias
125nA
Voltage - Input Offset
1700µV
Current - Supply
390µA
Current - Output / Channel
4mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 24 V, ±0.9 V ~ 12 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Other names
*LM6132BIN

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LM6132/34 Application Information
The LM6132 brings a new level of ease of use to op amp
system design.
With greater than rail-to-rail input voltage range concern
over exceeding the common-mode voltage range is elimi-
nated.
Rail-to-rail output swing provides the maximum possible dy-
namic range at the output. This is particularly important
when operating on low supply voltages.
The high gain-bandwidth with low supply current opens new
battery powered applications, where high power consump-
tion, previously reduced battery life to unacceptable levels.
To take advantage of these features, some ideas should be
kept in mind.
ENHANCED SLEW RATE
Unlike most bipolar op amps, the unique phase reversal
prevention/speed-up circuit in the input stage eliminates
phase reversal and allows the slew rate to be very much a
function of the input signal amplitude.
Figure 2 shows how excess input signal is routed around the
input collector-base junctions directly to the current mirrors.
The LM6132/34 input stage converts the input voltage
change to a current change. This current change drives the
current mirrors through the collectors of Q1–Q2, Q3–Q4
when the input levels are normal.
If the input signal exceeds the slew rate of the input stage
and the differential input voltage rises above a diode drop,
the excess signal bypasses the normal input transistors,
(Q1–Q4), and is routed in correct phase through the two
additional transistors, (Q5, Q6), directly into the current mir-
rors.
This rerouting of excess signal allows the slew-rate to in-
crease by a factor of 10 to 1 or more. (See Figure 1.)
As the overdrive increases, the op amp reacts better than a
conventional op amp. Large fast pulses will raise the slew-
rate to around 25V to 30 V/µs.
This effect is most noticeable at higher supply voltages and
lower gains where incoming signals are likely to be large.
This speed-up action adds stability to the system when
driving large capacitive loads.
Slew Rate vs. Differential V
V
FIGURE 1.
S
=
±
12V
01234940
IN
11
DRIVING CAPACITIVE LOADS
Capacitive loads decrease the phase margin of all op amps.
This is caused by the output resistance of the amplifier and
the load capacitance forming an R-C phase lag network.
This can lead to overshoot, ringing and oscillation. Slew rate
limiting can also cause additional lag. Most op amps with a
fixed maximum slew-rate will lag further and further behind
when driving capacitive loads even though the differential
input voltage raises. With the LM6132, the lag causes the
slew rate to raise. The increased slew-rate keeps the output
following the input much better. This effectively reduces
phase lag. After the output has caught up with the input, the
differential input voltage drops down and the amplifier settles
rapidly.
These features allow the LM6132 to drive capacitive loads
as large as 500 pF at unity gain and not oscillate. The scope
photos (Figure 3 and Figure 4) above show the LM6132
driving a 500 pF load. In Figure 3 , the lower trace is with no
capacitive load and the upper trace is with a 500 pF load.
Here we are operating on
pulse. Excellent response is obtained with a C
Figure 4, the supplies have been reduced to
pulse is 4 V
compensation capacitor should be established after the
board layout is finished because the value is dependent on
board stray capacity, the value of the feedback resistor, the
closed loop gain and, to some extent, the supply voltage.
Another effect that is common to all op amps is the phase
shift caused by the feedback resistor and the input capaci-
tance. This phase shift also reduces phase margin. This
effect is taken care of at the same time as the effect of the
capacitive load when the capacitor is placed across the
feedback resistor.
The circuit shown in Figure 5 was used for these scope
photos.
PP
and C
F
FIGURE 2.
is 39 pF. The best value for the
±
12V supplies with a 20 V
f
of 39 pF. In
www.national.com
±
2.5V, the
01234936
PP

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