X5169V14I-2.7T1 Intersil, X5169V14I-2.7T1 Datasheet
X5169V14I-2.7T1
Specifications of X5169V14I-2.7T1
Related parts for X5169V14I-2.7T1
X5169V14I-2.7T1 Summary of contents
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... All other trademarks mentioned are the property of their respective owners. X5168, X5169 (Replaces X25268, X25169) June 15, 2006 FN8130.2 Detection and Reset Assertion reset threshold voltage using ™ protection RESET/RESET X5168 = RESET X5169 = RESET | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved ...
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... X5169S8IZ-4.5A (Note) (Note) X5168V14-4.5A X5168V AL X5169V14-4.5A X5168V14Z-4.5A X5168V Z AL X5169V14Z-4.5A (Note) (Note) X5168V14I-4.5A X5168V AM X5169V14I-4.5A X5168V14IZ-4.5A X5168V Z AM X5169V14IZ-4.5A (Note) (Note) X5168P X5168P X5169P X5168PZ (Note) X5168P Z X5169PZ (Note) X5168PI X5168P I X5169PI X5168PIZ (Note) X5168P Z I X5169PIZ (Note) X5169P Z I X5168S8* ...
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... PART RESET (ACTIVE LOW) MARKING (ACTIVE HIGH) X5168V14-2.7A X5168V AN X5169V14-2.7A X5168V14Z-2.7A X5168V Z AN X5169V14Z-2.7A (Note) (Note) X5168V14I-2.7A X5168V AP X5169V14I-2.7A X5168V14IZ-2.7A X5168V Z AP X5169V14IZ-2.7A (Note) (Note) X5168P-2.7 X5168P F X5169P-2.7 X5168PZ-2.7 X5168P Z F X5169PZ-2.7 (Note) (Note) X5168PI-2.7 X5168P G X5169PI-2.7 X5168PIZ-2.7 X5168P Z G X5169PIZ-2.7 ...
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Pin Description PIN (SOIC/PDIP) PIN TSSOP NAME SCK RESET/ RESET 3-5,10- X5168, X5169 Chip ...
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Principles of Operation Power-on Reset Application of power to the X5168, X5169 activates a power- on reset circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from starting to ...
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New V Applied = CC Old V Applied + Error CC Error ≥ Emax Emax = Maximum Desired Error FIGURE 3. V 4.7K V TRIP + Adj. Program 6 X5168, X5169 V Programming TRIP Execute Reset V TRIP Sequence Set ...
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... SPI Serial Memory The memory portion of the device is a CMOS serial EEPROM array with Intersil’s block lock protection. The array is internally organized The device features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus. The device utilizes Intersil’s proprietary Direct Write providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years ...
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The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When WEL = 1, the latch is set HIGH and when WEL = 0 the latch is reset LOW. The WEL bit is a volatile, read ...
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Read Sequence When reading from the EEPROM memory array first pulled low to select the device. The 8-bit READ instruction is transmitted to the device, followed by the 16-bit address. After the READ opcode and address are sent, ...
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SCK Instruction SI High Impedance SO FIGURE 6. READ STATUS REGISTER SEQUENCE CS SCK SI High Impedance SO FIGURE 7. WRITE ENABLE LATCH SEQUENCE SCK Instruction ...
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CS 0 SCK SI High Impedance SO Symbol Table WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don’t Care: Changes Allowed N/A 11 X5168, X5169 ...
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Absolute Maximum Ratings Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage Temperature . . . . . . . . . ...
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Equivalent A.C. Load Circuit 2.06kΩ Output RESET/RESET 3.03kΩ 100pF AC Electrical Specifications (Over recommended operating conditions, unless otherwise specified.) SYMBOL SERIAL INPUT TIMING f Clock frequency SCK t Cycle time CYC t CS lead time LEAD ...
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Serial Input Timing CS t LEAD SCK MSB IN High Impedance SO Serial Output Timing SYMBOL f Clock frequency SCK t Output disable time DIS t Output valid from clock low V t Output hold time HO ...
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Power-Up and Power-Down Timing V CC RESET (X5168) RESET (X5169) RESET Output Timing SYMBOL V Reset trip point voltage, X5168-4.5A, X5168-4.5A TRIP Reset trip point voltage, X5168, X5169 Reset trip point voltage, X5168-2.7A, X5169-2.7A Reset trip point voltage, X5168-2.7, X5169-2.7 ...
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V Reset Conditions TRIP SCK > Programmed V CC TRIP V Programming Specifications TRIP PARAMETER t SCK V program voltage setup time VPS TRIP t SCK V program voltage hold ...
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Typical Performance V Supply Current vs. Temperature ( Watchdog Timer Watchdog Timer Watchdog Timer Off ( -40C 25C Temp (°C) V vs. Temperature (programmed at ...
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Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...
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Plastic Dual-In-Line Packages (PDIP) D SEATING PLANE MDP0031 PLASTIC DUAL-IN-LINE PACKAGE SYMBOL PDIP8 PDIP14 A 0.210 0.210 A1 0.015 0.015 A2 0.130 0.130 b 0.018 0.018 b2 0.060 0.060 c 0.010 0.010 D 0.375 0.750 E 0.310 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...