LT1529CT-5#06PBF Linear Technology, LT1529CT-5#06PBF Datasheet - Page 7

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LT1529CT-5#06PBF

Manufacturer Part Number
LT1529CT-5#06PBF
Description
IC REG LDO 5V 3A TO220-5
Manufacturer
Linear Technology
Datasheet

Specifications of LT1529CT-5#06PBF

Regulator Topology
Positive Fixed
Voltage - Output
5V
Voltage - Input
Up to 15V
Voltage - Dropout (typical)
0.6V @ 3A
Number Of Regulators
1
Current - Output
3A
Current - Limit (min)
3.2A
Operating Temperature
0°C ~ 125°C
Mounting Type
Through Hole
Package / Case
TO-220-5 (Straight Leads)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PI FU CTIO S
OUTPUT (Pin 1): OUTPUT Pin. The OUTPUT pin supplies
power to the load. A minimum output capacitor of 22µF is
required to prevent oscillations. Larger values will be
required to optimize transient response for large load
current deltas. See the Applications Information section
for further information on output capacitance and reverse
output characteristics.
SENSE (Pin 2): SENSE Pin. For fixed voltage versions of
the LT1529 (LT1529-3.3, LT1529-5) the SENSE pin is the
input to the error amplifier. Optimum regulation will be
obtained at the point where the SENSE pin is connected to
the output pin. For most applications the SENSE pin is
connected directly to the OUTPUT pin at the regulator. In
critical applications small voltage drops caused by the
resistance (R
load, which would normally degrade regulation, may be
eliminated by connecting the SENSE pin to the OUTPUT
pin at the load as shown in Figure 1 (Kelvin Sense Connec-
tion). Note that the voltage drop across the external PC
traces will add to the dropout voltage of the regulator. The
SENSE pin bias current is 15µA at the nominal regulated
output voltage. This pin is internally clamped to – 0.6V
(one V
ADJ (Pin 2): Adjust Pin. For the LT1529 (adjustable
version) the ADJ pin is the input to the error amplifier. This
TYPICAL PERFOR
–10
–15
–20
–25
–5
U
5
0
– 50
Load Regulation
V
∆I
V
BE
IN
ADJ
LOAD
– 25
).
= V
= V
U
OUT
= 100mA to 3A
OUT
P
0
(NOMINAL) + 1V
TEMPERATURE (°C)
) of PC traces between the regulator and the
25
LT1529-3.3
U
LT1529
50
LT1529-5
75
W
LT1529 • G28
100
A
U
125
CE
C
– 0.1
– 0.2
HARA TERISTICS
0.2
0.1
0
3
2
1
LT1529-5 Transient Response
0
V
C
C
100
IN
IN
OUT
= 6V
= 3.3µF
= 47µF
200
C
300
400
TIME (µs)
500
pin is internally clamped to 6V and – 0.6V (one V
pin has a bias current of 150nA which flows into the pin.
See Bias Current curve in the Typical Performance Char-
acteristics. The ADJ pin reference voltage is equal to 3.75V
referenced to ground.
SHDN (Pin 4): Shutdown Pin. This pin is used to put the
device into shutdown. In shutdown the output of the
device is turned off. This pin is active low. The device will
be shut down if the SHDN pin is actively pulled low. The
SHDN pin current with the pin pulled to ground will be 6µA.
The SHDN pin is internally clamped to 7V and – 0.6V (one
V
logic or by open-collector logic with a pull-up resistor. The
pull-up resistor is only required to supply the leakage
current of the open-collector gate, normally several mi-
croamperes. Pull-up current must be limited to a maxi-
mum of 5mA. A curve of SHDN pin input current as a
BE
600
). This allows the SHDN pin to be driven directly by 5V
700
800
V
LT1529 • G29
IN
900
+
Figure 1. Kelvin Sense Connection
1000
5
4
LT1529-3.3/LT1529-5
V
SHDN
IN
– 0.1
– 0.2
LT1529-5
0.2
0.1
GND
0
3
2
1
OUTPUT
0
LT1529-5 Transient Response
SENSE
3
V
C
C
IN
IN
OUT
20
= 6V
= 10µF
= 22µF
40
1
2
60
R
R
P
P
80
+
TIME (µs)
100
LT1529 • F01
120
LT1529
LOAD
140
BE
160
). This
LT1529 • G30
152935fb
180
7
200

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