MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 141

• Manufacturer Part Number: MC68908GZ8MFAE
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68908GZ8MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: M689xx
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.13 Programmer’s Model of Control Registers
The programmer’s model has been laid out for maximum simplicity and efficiency.
overview on the control register block of the MSCAN08.
Freescale Semiconductor
Addr.
$050E
$0500
$0501
$0502
$0503
$0504
$0505
$0506
$0507
$0508
$0509
$050F
$0510
$0511
Register
Reserved
CRXERR
CTXERR
CIDAR0
CIDAR1
CMCR0
CMCR1 Read:
CRFLG
CBTR0
CBTR1
CTFLG
CRIER
CIDAC
CTCR
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 12-15. MSCAN08 Control Register Structure
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
RXERR7
TXERR7
WUPIF
WUPIE
SAMP
SJW1
Bit 7
AC7
AC7
R
0
0
0
0
0
= Unimplemented
RWRNIE
RXERR6
RWRNIF
ABTRQ2
TXERR6
TSEG22
ABTAK2
SJW0
AC6
AC6
R
6
0
0
0
TWRNIE
ABTRQ1
RXERR5
TXERR5
TSEG21
TWRNIF
ABTAK1
IDAM1
BRP5
AC5
AC5
R
5
0
0
ABTRQ0
RXERR4
TSEG20
ABTAK0
TXERR4
RERRIF
RERRIE
SYNCH
IDAM0
BRP4
AC4
AC4
R
4
0
Programmer’s Model of Control Registers
RXERR3
TLNKEN
TXERR3
TSEG13
TERRIF
TERRIE
BRP3
AC3
AC3
R
R
3
0
0
0
0
= Reserved
RXERR2
TSEG12
TXERR2
BOFFIE
BOFFIF
LOOPB
TXEIE2
SLPAK
BRP2
TXE2
AC2
AC2
R
2
0
Figure 12-15
RXERR1
TXERR1
TSEG11
SLPRQ
TXEIE1
WUPM
OVRIF
OVRIE
IDHIT1
BRP1
TXE1
AC1
AC1
R
1
gives an
SFTRES
CLKSRC
RXERR0
TXERR0
TSEG10
TXEIE0
IDHIT0
RXFIE
BRP0
TXE0
Bit 0
RXF
AC0
AC0
R
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