MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 267

• Manufacturer Part Number: MC68908GZ8MFAE
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68908GZ8MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: M689xx
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.9.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
19.9.4 TIM Channel Status and Control Registers
Each of the TIM channel status and control registers:
Freescale Semiconductor
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Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture trigger
Selects output toggling on TIM overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Address: T1MODH, $0023 and T2MODH, $002E
Address: T1MODL, $0024 and T2MODL, $002F
Address: T1SC0, $0025 and T2SC0, $0030
Address: T1SC1, $0028 and T2SC1, $0033
Reset the TIM counter before writing to the TIM counter modulo registers.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 19-10. TIM Channel 0 Status and Control Register (TSC0)
Figure 19-11. TIM Channel 1 Status and Control Register (TSC1)
Figure 19-8. TIM Counter Modulo Register High (TMODH)
Figure 19-9. TIM Counter Modulo Register Low (TMODL)
Bit 15
CH0F
CH1F
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
1
0
0
0
0
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
= Unimplemented
CH0IE
CH1IE
14
6
1
6
6
1
6
0
6
0
MS0B
13
5
1
5
5
1
5
0
5
0
0
NOTE
MS0A
MS1A
12
4
1
4
4
1
4
0
4
0
ELS0B
ELS1B
11
3
1
3
3
1
3
0
3
0
ELS0A
ELS1A
10
2
1
2
2
1
2
0
2
0
TOV0
TOV1
1
9
1
1
1
1
1
0
1
0
CH0MAX
CH1MAX
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 0
1
1
0
0
I/O Registers
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