TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 375
TMPM362F10FG
Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet
1.TMPM362F10FG.pdf
(744 pages)
Specifications of TMPM362F10FG
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
Details
Other names
Q5704184A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
- Current page: 375 of 744
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11.5.4
11.5.5
11.5.6
11.5.7
11.5.8
11.5.9
TBxCP1 capture registers. The timing with which to latch data is specified by TBxMOD<TBCPM[1:0]>.
UC values are taken into the TBxCP0 capture register each time "0" is written to TBxMOD<TBCP>.
ing the TBxUC registers.
and TBxRG1) to detect whether there is a match or not. If a match is detected, INTTBx is generated.
ture registers. It can be enabled or disabled to reverse by setting the TBxFFCR<TBC1T1, TBC0T1,
TBE1T1, TBE0T1>.
TBxFFCR<TBFF0C[1:0]>. It can be set to "1" by writing "01," and can be cleared to "0" by writing "10."
the corresponding port settings must be programmed beforehand.
ter into the TBxCP0 and TBxCP1 capture registers. The interrupt timing is specified by the CPU.
This is a circuit that controls the timing of latching values from the UC up-counter into the TBxCP0 and
Software can also be used to import values from the UC up-counter into the capture register; specifically,
This register captures an up-counter (UC) value.
Other than the capturing functions shown above, the current count value of the UC can be captured by read-
This register compares with the up-counter (UC) and the value setting of the Timer Register (TBxRG0
The timer flip-flop (TBxFF0) is reversed by a match signal from the comparator and a latch signal to the cap-
The value of TBxFF0 becomes undefined after a reset. The flip-flop can be reversed by writing "00" to
The value of TBxFF0 can be output to the Timer output pin (TBxOUT). If the timer output is performed,
Interrupts INTCAPx0 and INTCAPx1 can be generated at the timing of latching values from the UC up-coun-
Capture
Capture registers (TBxCP0, TBxCP1)
Up-counter capture register (TBxUC)
Comparators (CP0, CP1)
Timer Flip-flop (TBxFF0)
Capture interrupt (INTCAPx0, INTCAPx1)
Page 351
TMPM362F10FG
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