TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 544

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
15.4
Operations
15.4.3.3
15.4.3.4
EN <CECTEN> bit.
can identify the interrupt factor by checking these bits.
(1)
Error detection during transmission generates an interrupt and stops transmission. It clears the CECT-
To identify an error factor, the CECTSTAT register has bits that correspond with each interrupt. You
Note:An attempt to stop transmission by an error may cause an improper waveform output to CEC. This
Detecting Transmission Error
Details of Transmission Error
Start bit
Data bit
ACK bit
EOMbit
is because output is stopped immediately after the error occurs.
An arbitration lost error occurs when CEC detects "Low" on completion of appropriate low duration.
Detecting an arbitration lost error sets the CECTSTAT <CECTIAL> bit.
Two types of the arbitration lost detection periods are shown below.
Arbitration Lost
Maximum “0”
output time
1.7 ms
Page 520
“0” output time
0.3 ms
2.0 ms
Detection
0.3 ms
period
Detection
period
Cycle setting :
CECTCR<CECDPRD>
Beginning of
the next bit
TMPM362F10FG

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