M52277EVB Freescale Semiconductor, M52277EVB Datasheet - Page 22

• Manufacturer Part Number: M52277EVB
• Description: BOARD DEMO FOR MCF5227
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: MCUr

Specifications of M52277EVB

• Contents: Board
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire
• Core Sub-architecture: Coldfire V2
• Silicon Core Number: MCF52
• Silicon Family Name: MCF5227x
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• For Use With/related Products: MCF52277
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
2
Electrical Characteristics
22
Num
FB4
FB5
FB6
FB7
Timing for chip selects only applies to the FB_CS[5:0] signals. Please see
Specifications,”
The FlexBus supports programming an extension of the address hold. Please consult the device reference manual for more
information.
Data Input Setup
Data Input Hold
Transfer Acknowledge (TA) Input Setup
Transfer Acknowledge (TA) Input Hold
for SD_CS[3:0] timing.
The processor drives the data lines during the first clock cycle of the transfer with the full
32-bit address. This may be ignored by standard connected devices using non-multiplexed
address and data buses. However, some applications may find this feature beneficial.
The address and data busses are muxed between the FlexBus and SDRAM controller. At
the end of the read and write bus cycles the address signals are indeterminate.
FB_CSn, FB_OE,
Table 13. FlexBus AC Timing Specifications (continued)
FB_BE/BWEn
MCF5227x ColdFire
Characteristic
FB_D[31:X]
FB_A[23:0]
FB_CLK
FB_R/W
FB_TS
FB_TA
Figure 9. FlexBus Read Timing
FB1
ADDR[31:X]
S0
®
FB2
Microprocessor Data Sheet, Rev. 8
NOTE
FB6
ADDR[23:0]
S1
DATA
Section 5.7.2.2, “DDR SDRAM AC Timing
FB4
Symbol
t
t
t
t
DVFBCH
CVFBCH
DIFBCH
CIFBCH
S2
FB7
FB5
Min
S3
3.5
0
4
0
FB3
Max
Freescale Semiconductor
—
—
—
—
Unit
ns
ns
ns
ns
Notes