ATA8204P3-TKQY Atmel, ATA8204P3-TKQY Datasheet - Page 29

IC RCVR ASK/FSK UHF 433MHZ 20SSO

ATA8204P3-TKQY

Manufacturer Part Number
ATA8204P3-TKQY
Description
IC RCVR ASK/FSK UHF 433MHZ 20SSO
Manufacturer
Atmel
Datasheet

Specifications of ATA8204P3-TKQY

Frequency
433MHz
Sensitivity
-115dBm
Data Rate - Maximum
10 kbps
Modulation Or Protocol
ASK, FSK
Applications
General Purpose
Current - Receiving
8.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.200", 5.30mm Width)
Pin Count
20
Screening Level
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
12. Conservation of the Register Information
Figure 12-1. Generation of the Power-on Reset
9121B–INDCO–04/09
Data_out (DATA)
POR
V
S
X
The ATA8203/ATA8204/ATA8205 uses an integrated power-on reset and brown-out detection
circuitry as a mechanism to preserve the RAM register information.
According to
below the threshold voltage V
tion registers in that condition. The POR is cancelled after the minimum reset period t
exceeds V
To indicate that condition, the receiver displays a reset marker (RM) at pin DATA after a reset.
The RM is represented by the fixed frequency f
using a low pulse t1 at pin DATA. The RM has the following characteristics:
Using this conservation mechanism, the receiver cannot lose its register information without
communicating this condition using the reset marker RM.
• f
• If the receiver is set back to polling mode using pin DATA, RM cannot be cancelled
misinterpreted by the connected microcontroller.
accidentally if t1 is applied as described in the proposal in
Configuration Register” on page
RM
is lower than the lowest feasible frequency of a data signal. Due to this, RM cannot be
ThReset
t
Rst
Figure
. A POR is also generated when the supply voltage of the receiver is turned on.
12-1, a power-on reset (POR) is generated if the supply voltage V
V
Threset
ThReset
. The default parameters are programmed into the configura-
30.
ATA8203/ATA8204/ATA8205
RM
at a 50% duty-cycle. RM can be cancelled
1/f
Section 13. “Programming the
RM
Rst
when V
S
drops
29
S

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