TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 105

• Manufacturer Part Number: TDA5230
• Description: IC RECEIVER ASK/FSK 28-TSSOP
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5230

• Package / Case: 28-TSSOP
• Frequency: 433MHz ~ 450MHz, 865MHz ~ 868MHz
• Sensitivity: -111dBm
• Data Rate - Maximum: 20 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 3 V ~ 3.6 V, 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 870 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000076520; TDA5230; TDA5230INTR

Figure 51
8-Bit extended Mode: As two correlators working simultaneously in
parallel of up to 16 chips length each, with matching information insertion
This bit is inserted at the beginning of the payload. “0” is inserted, when correlator A has
matched and “1” when correlator B has matched.
Figure 52
Selection of a TSI Pattern:
TSI Patterns must be different to the wake up bit stream and the RUNIN to clearly mark
the start of the following data frame. It should be considered that the sychronization has
a tolerance of about one bit. In addition, synchronization is related to data chips, and may
occur in the middle of a data bit. This all must be tolerated by the data framer.
Ideal TSI patterns have at their end a unique bit combination, which may also contain a
number of code violations (CVs).
Data Sheet
TSILENA = 8d, TSILENB = 12d
TSIGRSYN = 1
Incoming Pattern
Manchester Coded
TSI Pattern Match
FSYNC
Data into FIFO
TSILENA = 16d, TSILENB = 6d
Incoming Pattern
Manchester Coded
TSI Pattern B Match
FSYNC
Data into FIFO
TSI Mode 8-Bit Gap
TSI Mode 8Bit extended
0 0 0 0
RunIn
0 1 0 1 0 1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0
0 1 0
0 0 0 0
RunIn
7
0
6
1 1
S
5 4 3 2 1 0
TSIPTA
0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 1 0 0 1
0 0
Gap
1
0 0
0 1 0 1 0 1 0 0 1 0
0 0 0 0
Matching Information inserted
101
RunIn
5 4 3 2 1 0
0
1 1
TSIPTB
0 0
1 0 0 0 1 1 1 1 1 0 1
1
1
1110 9 8
1 0 1 1 1 1
1 0 1 0 0 1 0
0
TSIPTB
7
0 0
6
Functional Description
5 4 3 2 1 0
Version 4.0, 2007-06-01
0 1 0
1
1
TDA523x
1 0 1