TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 114

• Manufacturer Part Number: TDA5230
• Description: IC RECEIVER ASK/FSK 28-TSSOP
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5230

• Package / Case: 28-TSSOP
• Frequency: 433MHz ~ 450MHz, 865MHz ~ 868MHz
• Sensitivity: -111dBm
• Data Rate - Maximum: 20 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 3 V ~ 3.6 V, 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 870 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000076520; TDA5230; TDA5230INTR

TDA523x
Functional Description
2.4.14
Message-ID Scanning
Hardware Description
This unit is used to define an ID or special combination of bits in the data stream, which
identifies the pattern. All SFRs configuring the Message ID Scanning Unit feature the
dual configuration capability. Furthermore, it is available in the Slave and Self Polling
Mode. The MID Unit can be mainly configured in 2 Modes: 4-Byte and 2-Byte organized
Message ID. For each configuration there are 20 8-bit registers designed for ID storage
(MID0...MID19). The MIDC0 and MIDC1 are used to configure the MID Unit: Enabling of
the MID scanning, setting of the ID storage organization, the starting position of the
comparison and number of Bytes to scan.
When the Message ID Scanning Unit is activated by the MIDC1, the incoming data
stream is compared bit-wise serially with all stored IDs. If the Scan End Position is
reached and all received data have matched the observed part of at least one MID, the
Message ID Scanning Unit indicates successful MID scanning to the Master FSM, which
generates a MID interrupt.
Please note that the default register value of the MID Registers is set to 0x00. All MID
registers must be set to a pattern value to avoid matching to default value 0x00.
If the MID Unit finishes ID matching without success, the data receiving is stopped and
the FSM waits again for a Frame Start criterion. The received bits are still stored in the
FIFO. For details see also
Chapter 2.4.15 Data
FIFO.
Data Sheet
110
Version 4.0, 2007-06-01